- Networks Analysis and Synthesis - Section 1
- Networks Analysis and Synthesis - Section 2
- Networks Analysis and Synthesis - Section 3
- Networks Analysis and Synthesis - Section 4
- Networks Analysis and Synthesis - Section 5
- Networks Analysis and Synthesis - Section 6
- Networks Analysis and Synthesis - Section 7
- Networks Analysis and Synthesis - Section 8
- Networks Analysis and Synthesis - Section 9
- Networks Analysis and Synthesis - Section 10
- Networks Analysis and Synthesis - Section 11
- Networks Analysis and Synthesis - Section 12
- Networks Analysis and Synthesis - Section 13
- Networks Analysis and Synthesis - Section 14
- Networks Analysis and Synthesis - Section 15
- Networks Analysis and Synthesis - Section 16
- Networks Analysis and Synthesis - Section 17
- Networks Analysis and Synthesis - Section 18
- Networks Analysis and Synthesis - Section 19
- Networks Analysis and Synthesis - Section 20
- Networks Analysis and Synthesis - Section 21
- Networks Analysis and Synthesis - Section 22
- Networks Analysis and Synthesis - Section 23
- Networks Analysis and Synthesis - Section 24
- Networks Analysis and Synthesis - Section 25
- Networks Analysis and Synthesis - Section 26
- Networks Analysis and Synthesis - Section 27


Networks Analysis and Synthesis - Engineering
Q1: A 20 Ω resistor, a 1H inductor and 1μF capacitor are connected in parallel the combination is driven by a unit step current. Under the steady state, source current flows throughA
inductor
B
capacitor
C
resistor
D
all
ANS:A - inductor
Under steady state, C will be open, Inductor short circuit hence resistance will be shorted out, due to low reactance path current will now due to inductor only.
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