A 4 bit synchronous counter has flip flops having propagation delay of 50 ns each and AND gates having propagation delay of 20 ns each. The maximum frequency of clock pulses can be-A-20 MHzB-50 MHzC-14.3 MHzD-5 MHz-C-14.3 MHz

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The correct option is  C 14.3 MHz  Maximum delay = 50 + 20 = 70 x 10 9 s. Hence .

Digital Electronics

Q1: A 4 bit synchronous counter has flip flops having propagation delay of 50 ns each and AND gates having propagation delay of 20 ns each. The maximum frequency of clock pulses can be

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Digital Electronics

Q1: A 4 bit synchronous counter has flip flops having propagation delay of 50 ns each and AND gates having propagation delay of 20 ns each. The maximum frequency of clock pulses can be

Solution

For help Students Orientation Mcqs Questions

For help Students Orientation
Mcqs Questions