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Digital Electronics - Engineering

Q1:

A 4 bit synchronous counter uses flip flops with a delay time of 15 ns each. The time required for change of state is

A 15 ns

B 30 ns

C 45 ns

D 60 ns

ANS:A - 15 ns

In a synchronous counter clock input is applied to all flip flops simultaneously. Hence total delay time is 15 ns.