A gated S-R flip-flop is in the hold condition whenever ________.-A-the Gate Enable is HIGHB-the Gate Enable is LOWC-the S and R inputs are both LOWD-the Gate Enable is HIGH and the S and R inputs are both LOW-D-the Gate Enable is HIGH and the S and R inputs are both LOW

Question

APTITUDE CRACK · Accepted Answer

D the Gate Enable is HIGH and the S and R inputs are both LOW No answer description is available.

Flip-Flops - Technical MCQs

A gated S-R flip-flop is in the hold condition whenever ________.

For help Students Orientation
Mcqs Questions

Quick Links

Newsletter

Flip-Flops - Technical MCQs

A gated S-R flip-flop is in the hold condition whenever ________.

Solution

For help Students Orientation Mcqs Questions

For help Students Orientation
Mcqs Questions