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Flip-Flops

Q1: A gated S-R flip-flop is in the hold condition whenever ________.

A the Gate Enable is HIGH

B the Gate Enable is LOW

C the S and R inputs are both LOW

D the Gate Enable is HIGH and the S and R inputs are both LOW

ANS:D - the Gate Enable is HIGH and the S and R inputs are both LOW

No answer description is available.



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