- Digital Electronics - Section 1
- Digital Electronics - Section 2
- Digital Electronics - Section 3
- Digital Electronics - Section 4
- Digital Electronics - Section 5
- Digital Electronics - Section 6
- Digital Electronics - Section 7
- Digital Electronics - Section 8
- Digital Electronics - Section 9
- Digital Electronics - Section 10
- Digital Electronics - Section 11
- Digital Electronics - Section 12
- Digital Electronics - Section 13
- Digital Electronics - Section 14
- Digital Electronics - Section 15
- Digital Electronics - Section 16
- Digital Electronics - Section 17
- Digital Electronics - Section 18
- Digital Electronics - Section 19
- Digital Electronics - Section 20
- Digital Electronics - Section 21
- Digital Electronics - Section 22
- Digital Electronics - Section 23
- Digital Electronics - Section 24


Digital Electronics - Engineering
Q1: In a JK master slave flip flopA
master is clocked when clock is low
B
slave is clocked when clock is high
C
master is clocked when clock is high and slave is clocked when clock is low
D
master is clocked when clock is low and slave is clocked when clock is high
ANS:C - master is clocked when clock is high and slave is clocked when clock is low No answer description is available. |


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