In order for an output to swing above and below a zero reference, the op-amp circuit requires:

ANS:D - a negative and positive supply

Swing is the difference of maximum output voltage and minimum output voltage.

Maximum possible swing in the output you can have is VDD - VSS, where VDD is most positive voltage and VSS is most negative voltage.

It does not mean that your swing is VDD - VSS, it may be smaller than this. This depends on circuit design.

For CMOS logic family it is VDD - GND. It means CMOS logic family have full voltage swing.