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Q1:
In the following circuit , the comparator output in log: "I" if V1 > V2 and is logic "0" otherwise. The D/A conversion is done as per the relations VDAC = 2n-2 Volts, where b3 (MSB), b2, b1 and b0 (LSB) are the counter outputs. The counter starts from the clear state

The magnitude of the error between VDAC and Vin at steady state in volts is

A 0.2

B 0.3

C 0.5

D 1.0

ANS:C - 0.5

Magnitude error = 6.5 - 6.2 = 0.3 .



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