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Flip-Flops

Q1: What is one disadvantage of an S-R flip-flop?

A It has no enable input.

B It has an invalid state.

C It has no clock input.

D It has only a single output.

ANS:B - It has an invalid state.

When we give inputs to SR flip-flop, the outputs we get should be a compliment. That's is Q and Q' When S and R are high (S=R= 1),

The o/p is Q=0 and Q'=0. That's why it's called invalid state.



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