Describing Logic Circuits

Q1: In VHDL, the mode of a port does not define:

A an input.

B an output.

C both an input and an output.

D the TYPE of the bit.

Q2: The logic gate that will have HIGH or "1" at its output when any one of its inputs is HIGH is a(n):

A NOR gate

B OR gate

C AND gate

D NOT operation

Q3: How are the statements between BEGIN and END not evaluated in VHDL?

A Constantly

B Simultaneously

C Concurrently

D Sequentially

Q4:
Which timing diagram shown below is correct for an inverter?

A a

B b

C c

D d

Q5:
For a three-input NOR gate, with the input waveforms as shown below, which output waveform is correct?

A a

B b

C c

D d

Q6: Simplify the expression  using DeMorgan's theorems.

A

B

C

D

Q7:
Which step in this reduction process is using DeMorgan's theorem?

A STEP 1

B STEP 2

C STEP 3

D STEP 4

Q8:
Which logic gate does this truth table describe?

A AND

B OR

C NAND

D NOR

Q9:
Which step in this reduction process is using DeMorgan's theorem?

A STEP 1

B STEP 2

C STEP 3

D STEP 4

Q10: Simplify the expression  using DeMorgan's theorems.

A

B

C

D

Q11: An OR gate with inverted inputs functions as:

A an AND gate.

B a NAND gate.

C a NOR gate.

D an inverter.

Q12:
Which of the figures (a to d) is the DeMorgan equivalent of Figure (e)?

A a

B b

C c

D d

Q13:
Which of the figures given below represents a NAND gate?

A a

B b

C c

D d

Q14:
For a three-input AND gate, with the input waveforms as shown below, which output waveform is correct?

A a

B b

C c

D d

Q15: A small circle on the output of a logic gate is used to represent the:

A Comparator operation.

B OR operation.

C NOT operation.

D AND operation.

Q16: Which of the following equations would accurately describe a 4-input OR gate when A = 1, B = 1, C = 0, and D = 0?

A 1 + 1 + 0 + 0 = 1

B 1 + 1 + 0 + 0 = 01

C 1 + 1 + 0 + 0 = 0

D 1 + 1 + 0 + 0 = 00

Q17:
Which of the figures in figure (a to d) is equivalent to figure (e)?

A a

B b

C c

D d

Q18:
Which of the figures given below represents a NOR gate?

A a

B b

C c

D d

Q19:
Which of the figures given below represents an OR gate?

A a

B b

C c

D d

Q20: Which of the examples below expresses the distributive law?

A (A + B) + C = A + (B + C)

B A(B + C) = AB + AC

C A + (B + C) = AB + AC

D A(BC) = (AB) + C

Q21: The special software application that translates from HDL into a grid of 1's and 0's, which can be loaded into a PLD, is called a:

A formatter.

B compiler.

C programmable wiring.

D CPU.

Q22: A NOR gate with one HIGH input and one LOW input:

A will output a HIGH

B functions as an AND

C will not function

D will output a LOW

Q23: The format used to present the logic output for the various combinations of logic inputs to a gate is called a(n):

A truth table.

B input logic function.

C Boolean constant.

D Boolean variable.

Q24:
For a three-input OR gate, with the input waveforms as shown below, which output waveform is correct?

A a

B b

C c

D d

Q25: The format used to present the logic output for the various combinations of logic inputs to a gate is called a(n):

A truth table.

B input logic function.

C Boolean constant.

D Boolean variable.

Q26: A NAND gate has:

A active-LOW inputs and an active-HIGH output.

B active-LOW inputs and an active-LOW output.

C active-HIGH inputs and an active-HIGH output.

D active-HIGH inputs and an active-LOW output.

Q27: Which of the examples below expresses the associative law of addition:

A A + (B + C) = (A + B) + C

B A + (B + C) = A + (BC)

C A(BC) = (AB) + C

D ABC = A + B + C

Q28:
Which of the symbols shown below represents an AND gate?

A a

B b

C c

D d

Q29: Which of the following is a form of DeMorgan's theorem?

A

B

C

D

Q30:
For a 3-input NAND gate, with the input waveforms as shown below, which output waveform is correct?

A a

B b

C c

D d

Q31: What is the basic difference between AHDL and VHDL?

A ADHL is used in all PLD's.

B VHDL is used in all PLD's.

C ADHL is proprietary.

D VHDL is proprietary.

Q32: The Boolean equation for a NOR function is:

A

B

C

D


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