## Integrated Circuit Technologies

A Charging time associated with the output resistance of the driving gate
B Discharging time associated with the output resistance of the driving gate
C Output capacitance of the load gates
D Input capacitance of the load gates

A 1.4 pJ
B 1.6 pJ
C 2.4 pJ
D 3.3 pJ

A –12.8 mA
B –8 mA
C –1.6 mA
D –25.6 mA

A 40 A
B 200 A
C 400 A
D 800 A

# Q5: PMOS and NMOS circuits are used largely in ________.

A MSI functions
B LSI functions
C diode functions
D TTL functions

A FET
B MOSFET
C Bipolar
D Unijunction

# Q7: It is best not to leave unused TTL inputs unconnected (open) because of TTL's ________.

A noise sensitivity
B low-current requirement
C open-collector outputs
D tristate construction

# Q8: In a TTL circuit, if an excessive number of load gate inputs are connected, ________.

A VOH(min) drops below VOH
B VOH drops below VOH(min)
C VOH exceeds VOH(min)
D VOH and VOH(min) are unaffected

A 16 mA
B 20 mA
C 16 A
D 20 A

# Q10: An open-collector output requires ________.

A a pull-down resistor
B a pull-up resistor
C no output resistor
D an output resistor

# Q11: Which equation is correct?

A VNL = VIL(max) + VOL(max)
B VNH = VOH(min) + VIH(min)
C VNL = VOH(min) – VIH(min)
D VNH = VOH(min) – VIH(min)

A BiCMOS
B TTL/CMOS
C ECL
D TTL/MOS

# Q13: Which is not part of emitter-coupled logic (ECL)?

A Differential amplifier
B Bias circuit
C Emitter-follower circuit
D Totem-pole circuit

A +3 V
B +5 V
C +9 V
D +12 V

A 5.5 mW
B 5.5 W
C 5 mW
D 1.1 mW

A Gate
B Drain
C Source
D Base

# Q17: Most TTL logic used today is some form of ________.

A Schottky TTL
B tristate TTL
C low-power TTL
D open-collector TTL

# Q18: The greater the propagation delay, the ________.

A lower the maximum frequency
B higher the maximum frequency
C maximum frequency is unaffected
D minimum frequency is unaffected

# Q19: One output structure of a TTL gate is often referred to as a ________.

A totem-pole arrangement
B diode arrangement
C JBT arrangement
D base, emitter, collector arrangement

# Q20: An open-drain gate is the CMOS counterpart of ________.

A an open-collector TTL gate
B a tristate TTL gate
C a bipolar junction transistor
D an emitter-coupled logic gate

# Q21: Which is not a precaution for handling CMOS?

A Devices should be placed with pins down on a grounded surface, such as a metal plate.
B All tools, test equipment, and metal workbenches should be earth grounded.
C CMOS devices should not be inserted into sockets or PC boards with the power on.
D Wear wool clothes at all times.

A HIGH
B LOW
C High-Z
D Low-Z

# Q23: The active switching element used in all TTL circuits is the ________.

A bipolar junction transistor (BJT)
B field-effect transistor (FET)
C metal-oxide semiconductor field-effect transistor (MOSFET)
D unijunction transistor (UJ)

A 2.55 W
B 1.27 W
C 12.75 W
DW

# Q25: TTL is alive and well, particularly in ________.

A industrial applications
B educational applications
C military applications
D commercial applications

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