Interfacing to the Analog World

Q1: Inaccurate A/D conversion may be due to:

A constant analog input voltage

B linear ramp usage

C intermittent counter inputs

D faulty sample-and-hold circuitry

Q2: If the same analog signal is to be converted to an 8-bit resolution using a counter-ramp ADC, how many comparator circuits would be used?

A 1

B 8

C 127

D 255

Q3:
Referring to the given figure, what appears to be wrong, if anything, with the output of the D/A converter?

A The input signal is probably noisy.

B There appears to be some nonlinearity in the scope display.

C The converter has a nonmonotonic output error.

D It appears that certain input codes are incorrect; double-check the input coding.

Q4:
What is the current in R1 and the current in R2 for the circuit shown below?

A I1 = 0.416 mA, I2 = 0.416 mA

B I1 = 0.357 mA, I2 = 0.357 mA

C I1 = 1.25 mA, I2 = 0.625 mA

D I1 = 0.625 mA, I2 = 1.25 mA

Q5: What is the resolution of a D/A converter?

A the comparison between the actual output of the converter and its expected output

B the reciprocal of the number of discrete steps in the D/A output

C the deviation between the ideal straight-line output and the actual output of the converter

D the ability to resolve between forward and reverse steps when sequenced over its entire range

Q6: One disadvantage of the tracking A/D converter is:

A that it requires two counters—one for up and one for down.

B that the binary output will oscillate between two binary states when the analog input is constant.

C the need for an accurate clock reference for the counter.

D the need for a latch and its associated control circuit.

Q7:
What is the current in the feedback resistor for the circuit given below?

A 0.625 mA

B 1.25 mA

C 1.875 mA

D 1.625 mA

Q8: The main advantage of the successive-approximation A/D converter over the counter-ramp A/D converter is its:

A more complex circuitry

B less complex circuitry

C longer conversion time

D shorter conversion time

Q9: Which of the statements below best describes the basic operation of a dual-slope A/D converter?

A The input voltage is used to set the frequency of a voltage-controlled oscillator (VCO). The VCO quits changing frequency when the input voltage stabilizes. The frequency of the VCO, which is proportional to the analog input voltage, is measured and is displayed on the digital display as a voltage reading.

B A ramp generator is used to enable a counter through a comparator. When the ramp voltage equals the input voltage, the counter is latched and then reset. The counter reading is proportional to the input voltage since the ramp is changing at a constant V/second rate.

C A ramp voltage and analog input voltage are applied to a comparator. As the input voltage causes the integrating capacitor to charge, it will at some point equal the ramp voltage. The ramp voltage is measured and displayed on the digital panel meter.

D Two ramps are generated: one by the input voltage and the other by a reference voltage. The input voltage ramp charges the integrating capacitor, while the reference voltage discharges the capacitor and enables the counter until the capacitor is discharged, at which time the counter value is loaded into the output latches.

Q10: An analog quantity varies from 0–7 V and is input to a 6-bit A/D converter. What analog value is represented by each step on the digital output?

A 0.111 V

B 1.17 V

C 0.109 V

D 0.857 V

Q11: What is the maximum conversion time for a counter-ramp ADC with 8-bit resolution and a clock frequency of 20 kHz?

A 12.8 ms

B 6.4 ms

C 0.05 ms

D 0.4 ms

Q12:
What is the maximum output voltage for the circuit shown below?

A –20 volts

B –5 volts

C –9.375 volts

D –2.1775 volts

Q13: A 4-bit R/2R D/A converter has a reference of 5 V. What is the analog output for the input code 0101?

A 3.125 V

B 0.3125 V

C 0.78125 V

D –3.125 V

Q14: Which of the following characterizes an analog quantity?

A Discrete levels represent changes in a quantity.

B Its values follow a logarithmic curve.

C It can be described with a finite number of steps.

D It has a continuous set of values over a given range.

Q15: Which of the equations below expresses the voltage gain relationship for an operational amplifier?

A Vout = Vin/Av

B Vout/Vin = Rout/Rin

C Vin/Vout = Rout/Rin

D Vout/Vin = –Rf/Rin

Q16: An analog-to-digital converter has a four-bit output. How many analog values can it represent?

A 4

B 1/4

C 16

D 0.0625

Q17: What is the linearity of a D/A converter?

A It is the reciprocal of the number of discrete steps in the D/A output.

B It is the comparison between the actual output of the converter and its expected output.

C It is the converter's ability to resolve between forward and reverse steps when sequenced over its entire range of inputs.

D It is the deviation between the ideal straight-line output and the actual output of the converter.

Q18: What is the speed of the up/down digital-ramp ADC (tracking ADC)?

A 20 s

B 10 s

Cs

D Relatively slow

Q19: What is the disadvantage to using a counter-ramp type ADC?

A complex circuit

B high cost

C very slow

Q20: ________ are the most linear of all the temperature transducers.

A Thermistors

B Thermocouples

C IC temperature sensors

D Resistance temperature detectors

Q21: What is the accuracy of a D/A converter?

A It is the reciprocal of the number of discrete steps in the D/A output.

B It is the comparison between the actual output of the converter and its expected output.

C It is the converter's ability to resolve between forward and reverse steps when sequenced over its entire range of inputs.

D It is the deviation between the ideal straight-line output and the actual output of the converter.

Q22: A simultaneous A/D converter is also known as a(n) ________ A/D converter.

A flash

B synchronous

C comparator

D asynchronous

Q23: An actuator is usually a device that:

A converts analog data to meaningful digital data.

B controls a physical variable.

C stores digital data and then processes that data according to a set of specified instructions.

D converts a physical variable to an electrical variable.

Q24: What is the resolution, in percent, of a 12-bit DAC?

A 8.33

B 0.049

C 0.000488

D 0.083

Q25: A test system using the GPIB is being used to monitor a potentially dangerous crash test from a distance of 200 feet. The engineer decides to have you fabricate a special cable, rather than order one, since all the materials are on hand and the tests are already behind schedule. When the tests are run, the test system is erratic and the data is almost useless. What has gone wrong?

A The engineer is probably not using the correct data format for the specific instruments being used to collect the data.

B The GPIB cable is too long; a bus extender should be used.

C The cable should be shielded and properly grounded.

D The tests themselves probably produced extraneous signals that confused the instruments, resulting in unusable data.

Q26: How many different voltages can be output from a DAC with a 6-bit resolution?

A 6

B 16

C 32

D 64

Q27: Sample-and-hold circuits in A/D converters are designed to:

A sample and hold the output of the binary counter during the conversion process

B stabilize the comparator's threshold voltage during the conversion process

C stabilize the input analog signal during the conversion process

D sample and hold the D/A converter staircase waveform during the conversion process

Q28: What is the purpose of a sample-and-hold circuit?

A To keep temporary memory

B To hold a voltage constant so an ADC has time to produce an output

C To hold a voltage constant so a DAC has time to produce an output

D To hold data after a multiplexer has selected an output

Q29: Describe offset error for a DAC.

A missing codes

B error in the slope of the output staircase waveform

C more or less input voltage is required for the first step than what is specified

Q30: If an analog signal is to be converted to an 8-bit resolution, how many comparators are used in a parallel-encoded ADC?

A 127

B 128

C 255

D 256

Q31:
Referring to the given figure, what should the display on the scope look like if the A/D converter is working properly?

A It should be a circular Lissajous pattern resulting from the simultaneous application of ramps to the vertical and horizontal inputs of the oscilloscope.

B The pattern should be a straight line across the screen due to the equal but opposite voltages being applied to the scope inputs.

C A uniform stairstep pattern should be displayed.

D The scope should display a sequential binary count with the LSB on the left and the MSB on the right side of the display.

Q32:
What type of DAC is shown below?

A binary-weighted

B R-2R ladder

Q33:
Referring to the given figure, what should the display on the scope look like if the A/D converter is working properly?

A It should be a circular Lissajous pattern resulting from the simultaneous application of ramps to the vertical and horizontal inputs of the oscilloscope.

B The pattern should be a straight line across the screen due to the equal but opposite voltages being applied to the scope inputs.

C A uniform stairstep pattern should be displayed.

D The scope should display a sequential binary count with the LSB on the left and the MSB on the right side of the display.

Q34: When comparing the conversions from digital-to-analog and analog-to-digital, the A/D conversion is generally:

A less complicated but more time consuming than the D/A conversion.

B more complicated and more time consuming than the D/A conversion.

C less complicated and less time consuming than the D/A conversion.

D more complicated but less time consuming than the D/A conversion.

Q35:
What is the output voltage for the circuit shown below?

A 10 V

B 20 V

C 30 V

D 40 V

Q36: Why is a binary-weighted DAC usually limited to 4-bit binary conversion?

A too many pins on the IC

B too many op amps needed

C too many different values of capacitors

D too many different values of resistors

Q37: The basic approach to testing D/A converters is to:

A apply a sequence of binary codes covering the full range of input values to the circuit input while observing the output on an oscilloscope. The output should consist of a linear stairstep ramp.

B single-step the device through its full input range while checking the output with a DMM.

C check the output with zero input and then full input. The output of the converter should extend from zero to its maximum value. If so, then everything in between can be assumed to be operating properly.

D apply the correct input to the analog terminal and then check to see if the proper binary code exists on the digital inputs.

Q38: Three characteristics of op amps make them almost ideal amplifiers: very high input impedance, very low impedance, and ________.

A very high voltage gain

B unlimited bandwidth

C a low slew rate

D very high current gain

Q39: What is the main disadvantage of the stairstep-ramp A/D converter?

A The counter must count up from zero at the beginning of each conversion sequence, and the conversion time will vary depending on the input voltage.

B It requires a counter.

C It requires a precision clock in order for the conversion to be reliable.

D All of the above

Q40:
Referring to the given figure, what appears to be wrong, if anything, with the D/A converter and what should be done to correct the problem?

A There is nothing wrong with the converter.

B There is an offset error; if no provision is made for adjusting the offset, the op-amp may need to be changed.

C There is a nonlinearity error; the op-amp must be changed.

D The power supply voltage appears to be too high; adjust the power supply to the correct value.

Q41: Two principal advantages of the dual-slope ADC are its:

A high speed and low cost.

B high sensitivity to noise and low cost.

C low sensitivity to noise and high speed.

D low sensitivity to noise and low cost.

Q42: The quantization error in an analog-to-digital converter can be reduced by:

A increasing the number of bits in the counter and DAC.

B decreasing the number of bits in the counter and increasing the number of bits in the DAC.

C increasing the number of bits in the counter and decreasing the number of bits in the DAC.

D decreasing the number of bits in the counter and DAC.

Q43: What is the acquisition time of the AD1154 sample-and-hold IC?

A 1.5 s

B 2.5 s

C 3.5 s

D 4.5 s

Q44:
What is the output voltage of the given circuit if the inputs are as follows:
20 = 1, 21 = 1, 22 = 0, 23 = 0?

A –3.115 volts

B –2.8025 volts

C –1.875 volts

D –1.24 volts

Q45: What is the major advantage of the R/2R ladder D/A converter as compared to a binary-weighted D/A converter?

A It has fewer parts for the same number of inputs.

B It is much easier to analyze its operation.

C It uses only two different resistor values.

D The virtual ground is eliminated and the circuit is therefore easier to understand and troubleshoot.

Q46: What circuitry is on an ADC0808 IC?

A A multiplexer

B An ADC

C A 3-bit select input code

D All of the above

Q47: Which of the equations below expresses the voltage gain relationship for an operational amplifier?

A Vout = Vin/Av

B Vout/Vin = Rout/Rin

C Vin/Vout = Rout/Rin

D Vout/Vin = –Rf/Rin

Q48:
What function is performed by the block labeled X in the given figure?

A Analog-to-digital conversion

B Digital-to-analog conversion

C Audio ON/OFF control

D Power supply for the audio amplifier

Q49: A transducer is a device that:

A converts a physical variable to an electrical variable

B converts analog data to meaningful data

C controls a physical variable

D stores digital data and then processes that data according to a set of specified instructions

Q50: What is the major advantage of the R/2R ladder DAC as compared to a binary-weighted-input DAC?

A It has fewer parts for the same number of inputs.

B It is much easier to analyze its operation.

C It uses only two different resistor values.

D The virtual ground is eliminated and the circuit is therefore easier to understand and troubleshoot.

Q51: What is the main disadvantage of the counter-ramp A/D converter?

A It requires a counter.

B The counter must count up from zero at the beginning of each conversion sequence, and the conversion time will vary depending on the input voltage.

C It requires a precision clock in order for the conversion to be reliable.

D The counter must count up from zero at the beginning of each conversion sequence, and the conversion time will vary depending on the input voltage. It requires a precision clock in order for the conversion to be reliable.

Q52: A 4-bit stairstep-ramp A/D converter has a clock frequency of 100 kHz and maximum input voltage of 10 V.

A The maximum number of samples per second will be 6250.

B The maximum sample rate will be 100,000 samples/second.

C The minimum sample rate will be 6250 samples/second.

D The minimum sample rate will be 100,000 samples/second.

Q53: The practical use of binary-weighted digital-to-analog converters is limited to:

A R/2R ladder D/A converters

B 4-bit D/A converters

C 8-bit D/A converters

D op-amp comparators

Q54: The output of a basic 4-bit input digital-to-analog converter would be capable of outputting:

A 16 different values of voltage or current that are not proportional to the input binary number

B 16 different values of voltage or current that are proportional to the input binary number

C 32 different values of voltage or current that are not proportional to the input binary number

D 32 different values of voltage or current that are proportional to the input binary number

Q55: What is one advantage to using a parallel-encoded (flash) ADC?

A less expensive

B very fast conversion

C less complicated circuit

Q56: Which of the following characterizes an analog quantity?

A Discrete levels represent changes in a quantity.

B Its values follow a logarithmic response curve.

C It can be described with a finite number of steps.

D It has a continuous set of values over a given range.

Q57: What is gain error in a DAC?

A missing codes

B error in the slope of the output staircase waveform

C more or less input voltage is required for the first step than what is specified

Q58: Which of the following describes the basic operation of a single-slope A/D converter.

A The input voltage is used to set the frequency of a voltage-controlled oscillator (VCO). The VCO quits changing frequency when the input voltage stabilizes. The frequency of the VCO, which is proportional to the analog input voltage, is measured and is displayed on the digital display as a voltage reading.

B A ramp generator is used to enable a counter through a comparator. When the ramp voltage equals the input voltage the counter is latched and then reset. The counter reading is proportional to the input voltage since the ramp is changing at a constant V/second rate.

C A ramp voltage and analog input voltage are applied to a comparator. As the input voltage causes the integrating capacitor to charge, it will at some point equal the ramp voltage. The ramp voltage is measured and displayed on the digital panel meter.

D Any of the above could be correct, depending on the specific type of A/D converter involved.

Q59: If the range of output voltage of a 6-bit DAC is 0 to 15 volts, what is the step voltage of the output?

A 0.117 volt/step

B 0.234 volt/step

C 2.13 volts/step

D 4.26 volts/step

Q60: The process by which a computer acquires digitized analog data is referred to as ________.

A data acquisition

B monotonicity

C analog resolution

D systematic digital conversion

Q61: What is the linearity of a D/A converter?

A It is the reciprocal of the number of discrete steps in the D/A output.

B It is the comparison between the actual output of the converter and its expected output.

C It is the converter's ability to resolve between forward and reverse steps when sequenced over its entire range of inputs.

D It is the deviation between the ideal straight-line output and the actual output of the converter.

Q62: What is the conversion time of a flash converter?

A 20 s

B 10 s

Cs

D The conversion takes place continuously.

Q63: The primary disadvantage of the simultaneous A/D converter is:

A that it requires the input voltage to be applied to the inputs simultaneously

B the long conversion time required

C the large number of output lines required to simultaneously decode the input voltage

D the large number of comparators required to represent a reasonable sized binary number

Q64: What is the resolution of a D/A converter?

A It is the reciprocal of the number of discrete steps in the D/A output.

B It is the comparison between the actual output of the converter and its expected output.

C It is the deviation between the ideal straight-line output and the actual output of the converter.

D It is the converter's ability to resolve between forward and reverse steps when sequenced over its entire range of inputs.

Q65: What is the maximum conversion time for an 8-bit successive-approximation ADC with a clock frequency of 20 kHz?

A 12.8 ms

B 6.4 ms

C 0.05 ms

D 0.4 ms

Q66: One major difference between a counter-ramp A/D converter and a successive-approximation converter is:

A the counter-ramp A/D converter is much faster than the successive-approximation converter

B with the successive-approximation converter the final binary result is always slightly less than the equivalent analog input, whereas with the counter-ramp A/D converter it is slightly more

C with the successive-approximation converter the final binary result is always slightly more than the equivalent analog input, whereas with the counter-ramp A/D converter it is slightly less

D none of the above

Q67: A certain digital-to-analog converter has a step size of 0.25 V and a full-scale output of 7.75 V. Determine the percent of resolution and the number of input binary bits.

A 31%, 4 bits

B 3.23%, 4 bits

C 31%, 5 bits

D 3.23%, 5 bits


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