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Memory and Storage

Q1: A DRAM has a RAS and a CAS because ________.

A the address lines are multiplexed to reduce pin count

B the RAS determines the operation mode and the CAS enables the tristate outputs

C the RAS latches in the address and the CAS latches in data

D None of the above

ANS:A - the address lines are multiplexed to reduce pin count

No answer description is available.



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