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Shift Registers - Technical MCQs

Q1:

An 8-bit serial in/parallel out shift register is clocked at 4 MHz and is used to delay a serial digital signal by 1.25 s. The output that has the proper delay is ________.

A QE

B QF

C QG

D QH

ANS:A - QE

Given: f = 4 MHz; t = 1.25 μs; n =?

f = n/t.
4 MHz = n / 1.25 μs,
n = 5 --> QE.