Shift Registers - Technical MCQs

Q1:

Assume a 4-bit parallel in/serial out shift register is loaded with a binary number. How many clock pulses are required after the parallel load has occurred before the first bit in the sequence appears on the serial output line?

A 0

B 1

C 2

D 3

ANS:B - 1

In parallel_in for a single clock it will load the data. So before 1st bit appearing at output we require 1clock.