Assume a 4-bit ripple counter has a failure in the second flip-flop such that it "locks up." The third and fourth stages will ________.

ANS:C - stop counting

Ripple counters are asynchronous counters. In the asynchronous counters the output of the previous stage is feed as the clock pulse to the next stage. So when the output of the 2 ff is locked-up no clock pulse is given to the next stage. Without the clock pulse the ff will not work. So the 3rd and 4th stage ff will stop counting.