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Combinational Logic Analysis

Q1: Assume you have A, B, C, and D available but not their complements. The minimum number of 2-input NAND gates required to implement the equation  is ________.

A 3

B 4

C 5

D 6

ANS:C - 5

We can write this eq as AA'+AB'+BB'+BC' bcoz AA'=0 then again we simply this eq as A(A'+B')+B(B'+C').

We need 1NAND gate for A'+B'.
For A(A'+B') 1NAND.
For B'+C' 1NAND.
For B(B'+C') 1NAND.

FINALLY, FOR THAT EQ WE NEED ANOTHER NAND GATE totally 5NAND GATES.



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