Shift Registers

Q1: The bit sequence 10011100 is serially entered (right-most bit first) into an 8-bit parallel out shift register that is initially clear. What are the Q outputs after four clock pulses?

A 00001100

B 11110000

C 10011100

D 11000000

ANS:B - 11000000

10011100/00000000
1001110/00000000----> 1st clk
100111/00000000 ----->2nd clk
10011/10000000 ------>3rd clk
1001/11000000 ------>4th clk

So ans is 11000000.



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