Shift Registers

Q1: The group of bits 11001 is serially shifted (right-most bit first) into a 5-bit parallel output shift register with an initial state 01110. After three clock pulses, the register contains ________.

A 00101

B 01110

C 00001

D 00110

ANS:C - 00101

It is give right most bit is first 11001.

1100/10111->1st clk pulse.
110/01011->2nd clk pulse.
11/00101->3rd Clo pulse.

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