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Counters - Technical MCQs

Q1:

The process of designing a synchronous counter that will count in a nonbinary manner is primarily based on:

A external logic circuits that decode the various states of the counter to apply the correct logic levels to the J-K inputs

B modifying BCD counters to change states on every second input clock pulse

C modifying asynchronous counters to change states on every second input clock pulse

D elimination of the counter stages and the addition of combinational logic circuits to produce the desired counts

ANS:A - external logic circuits that decode the various states of the counter to apply the correct logic levels to the J-K inputs

No answer description is available.