Shift Registers

Q1: When an 8-bit serial in/serial out shift register is used for a 20 s time delay, the clock frequency is ________.

A 400 kHz

B 50 kHz

C 500 kHz

D 40 kHz

ANS:C - 400 kHz

total delay(Td) provided by SISO = n*Tclk.
20 micro-sec = 8*Tclk,
Tclk = (20 micro-sec/8),
Fclk = (1/Tclk) = (8/20 micro-sec) = (8000/20)kHz = 400KHz.

img not found

For help Students Orientation
Mcqs Questions

One stop destination for examination, preparation, recruitment, and more. Specially designed online test to solve all your preparation worries. Go wherever you want to and practice whenever you want, using the online test platform.