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Shift Registers

Q1:

When an 8-bit serial in/serial out shift register is used for a 20 s time delay, the clock frequency is ________.

A 40 kHz

B 50 kHz

C 400 kHz

D 500 kHz

ANS:C - 400 kHz

total delay(Td) provided by SISO = n*Tclk.
20 micro-sec = 8*Tclk,
Tclk = (20 micro-sec/8),
Fclk = (1/Tclk) = (8/20 micro-sec) = (8000/20)kHz = 400KHz.



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